STM32F205RET6TR ARM Microcontrollers – MCU Hi-perf ARM Cortex M3 MCU 512Kb

ʻO ka wehewehe pōkole:

Nā mea hana: STMicroelectronics
Māhele Huahana: ARM Microcontrollers – MCU
Pepa ʻikepili:STM32F205RET6TR
ʻO ka wehewehe: Microcontrollers - MCU
ʻO ke kūlana RoHS: RoHS Compliant


Huahana Huahana

Nā hiʻohiʻona

Huahana Huahana

♠ wehewehe huahana

Huahana Huahana Waiwai Hiʻona
Mea hana: STMicroelectronics
Māhele Huahana: ARM Microcontrollers - MCU
RoHS: Nā kikoʻī
moʻo: STM32F205RE
Kāila kau ʻana: SMD/SMT
Pūʻolo / hihia: LQFP-64
kumu: ARM Cortex M3
Ka nui o ka hoʻomanaʻo papahana: 512 kB
ʻIkepili kaʻaahi laula: 32 bit
Hoʻoholo ADC: 12 bit
Ka nui o ka uaki: 120 MHz
Ka helu o nā I/Os: 51 I/O
Nui ʻikepili RAM: 128 kB
Voltage Hoʻolako - Min: 1.8 V
Voltage Hoʻolako - Max: 3.6 V
Mahana hana liʻiliʻi loa: - 40 C
ʻO ka wela hoʻohana kiʻekiʻe loa: + 85 C
Packaging: Reel
Packaging: ʻOki lipine
Packaging: Huli ʻIole
Brand: STMicroelectronics
ʻAno RAM ʻikepili: SRAM
Nui ʻikepili ROM: 512 B
ʻAi ʻoluʻolu: ʻAe
Pūʻina hana: ARM Cortex M
ʻAno Huahana: ARM Microcontrollers - MCU
ʻAno hoʻomanaʻo papahana: Flash
Ka nui o ka waihona hale hana: 1000
Māhele ʻāpana: Nā Microcontrollers - MCU
inoa kalepa: STM32
Huina Weight: 0.012088 oz

♠ 32-bit MCU, 150 DMIP, a hiki i ka 1 MB Flash/128+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIM, 3 ADC, 15 comm.nā kikowaena a me nā kamera

Hoʻokumu ʻia ka ʻohana STM32F20x ma luna o Arm® Cortex®-M3 32-bit RISC core e hana ana ma ke alapine a hiki i 120 MHz.Hoʻokomo ka ʻohana i nā hoʻomanaʻo hoʻopili kiʻekiʻe (Flash memory a hiki i 1 Mbyte, a hiki i 128 Kbytes o ka ʻōnaehana SRAM), a hiki i 4 Kbytes o ka SRAM hoʻihoʻi, a me kahi ākea o nā I/Os i hoʻonui ʻia a me nā peripheral i pili i ʻelua mau pahi APB, ʻekolu mau kaʻa kaʻa AHB a me kahi matrix bus 32-bit multi-AHB.

Hoʻokomo pū ʻia nā hāmeʻa i kahi adaptive real-time memory accelerator (ART Accelerator™) e hiki ai ke hoʻokō i kahi hana e like me 0 kali ka hoʻokō ʻana o ka papahana mokuʻāina mai ka hoʻomanaʻo Flash ma ke alapine CPU a hiki i 120 MHz.Ua hōʻoia ʻia kēia hana me ka hoʻohana ʻana i ka benchmark CoreMark®.


  • Mua:
  • Aʻe:

  • ■ Core: Arm® 32-bit Cortex®-M3 CPU (120 MHz max) me ka Adaptive real-time accelerator (ART Accelerator™) e ʻae ana i ka hana hoʻokō mokuʻāina 0-kali mai Flash memory, MPU, 150 DMIPS/1.25 DMIPS/MHz ( Dhrystone 2.1)

    ■ Hoomanao

    - A hiki i 1 Mbyte o ka hoʻomanaʻo Flash

    - 512 bytes o ka hoʻomanaʻo OTP

    - A hiki i 128 + 4 Kbytes o SRAM

    - Kākoʻo ka hoʻomanaʻo hoʻomanaʻo static maʻalahi e kākoʻo i nā hoʻomanaʻo Compact Flash, SRAM, PSRAM, NOR a me NAND

    - Pākuʻi like LCD, 8080/6800 mau ʻano

    ■ Uaki, hoʻoponopono a me ka hoʻolako hoʻokele

    - Mai ka 1.8 a hiki i ka 3.6 V lako noi + I/Os

    – POR, PDR, PVD a me BOR

    – 4 a 26 MHz oscillator kristal

    - ʻO RC i kālai ʻia i loko o ka hale hana 16 MHz

    - 32 kHz oscillator no RTC me ka calibration

    - 32 kHz RC kūloko me ka calibration

    ■ Nā ʻano mana haʻahaʻa

    - Nā ʻano moe, hoʻomaha a me ke kūpaʻa

    - Hāʻawi ʻo VBAT no RTC, 20 × 32 bit backup registers, a me 4 Kbytes backup SRAM koho.

    ■ 3 × 12-bit, 0.5 µs ADCs a hiki i 24 mau alahele a hiki i 6 MSPS ma ke ʻano hui ʻekolu.

    ■ 2 × 12-bit D/A mea hoʻololi

    ■ DMA manaʻo nui: 16-stream controller me nā FIFO kikowaena a me ke kākoʻo pahū

    ■ A hiki i ka 17 manawa

    - A hiki i ʻumikūmālua 16-bit a ʻelua mau manawa 32-bit, a hiki i 120 MHz, kēlā me kēia me ʻehā IC/OC/PWM a i ʻole ka helu pulse a me ka quadrature (incremental) encoder input

    ■ Keʻano hoʻopololei: Serial wire debug (SWD), JTAG, a me Cortex®-M3 Embedded Trace Macrocell™

    ■ A hiki i 140 mau awa I/O me ka hiki ke hoopau:

    - A hiki i 136 wikiwiki I/Os a hiki i 60 MHz

    – A hiki i ka 138 5 V-tolerant I/Os

    ■ A hiki i 15 mau pilina pili

    - A hiki i ʻekolu mau pilina I2C (SMBus/PMBus)

    - A hiki i ʻehā USART a me ʻelua mau UART (7.5 Mbit/s, ISO 7816 interface, LIN, IrDA, mana modem)

    - A hiki i ʻekolu SPI (30 Mbit/s), ʻelua me ka muxed I2S e hoʻokō i ka pololei o ka papa leo ma o PLL leo a i ʻole PLL waho.

    - 2 × CAN mau pilina (2.0B Active)

    – SDIO interface

    ■ Hoʻohui kiʻekiʻe

    - USB 2.0 piha-wikiwiki piha/host/OTG kaohi me ka ma-chip PHY

    - USB 2.0 kiʻekiʻe-wikiwiki / piha-wikiwiki uila / host / OTG kaohi me ka DMA i hoʻolaʻa ʻia, ma ka chip PHY piha holoʻokoʻa a me ULPI

    - 10/100 Ethernet MAC me ka DMA i hoʻolaʻa ʻia: kākoʻo i ka lako IEEE 1588v2, MII/RMII

    ■ 8- a hiki i ka 14-bit huikau pahupaʻikiʻi like (48 Mbyte/s max.)

    ■ Hui helu CRC

    ■ 96-bit kū hoʻokahi ID

    Nā Huahana Pili