LCMXO2-2000HC-4BG256C FPGA – Māhele Programmable Gate Array 2112 LUTs 207 IO 3.3V 4 Spd
♠ wehewehe huahana
| Huahana Huahana | Waiwai Hiʻona |
| Mea hana: | Lattice |
| Māhele Huahana: | FPGA - ʻĀpana Programmable Gate Array |
| RoHS: | Nā kikoʻī |
| moʻo: | LCMXO2 |
| Ka helu o nā Elements Logic: | 2112 LE |
| Ka helu o nā I/Os: | 206 I/O |
| Voltage Hoʻolako - Min: | 2.375 V |
| Voltage Hoʻolako - Max: | 3.6 V |
| Mahana hana liʻiliʻi loa: | 0 C |
| ʻO ka wela hoʻohana kiʻekiʻe loa: | + 85 C |
| Ka helu ʻikepili: | - |
| Ka helu o nā mea lawe uila: | - |
| Kāila kau ʻana: | SMD/SMT |
| Pūʻolo / hihia: | CABGA-256 |
| Packaging: | pā |
| Brand: | Lattice |
| Hoʻolaha ʻia ka RAM: | 16 kbit |
| Pākaʻi RAM - EBR: | 74 kbit |
| ʻO ke alapine hana kiʻekiʻe loa: | 269 MHz |
| ʻAi ʻoluʻolu: | ʻAe |
| Ka helu o nā poloka Lahui Logic - LABs: | 264 LAB |
| Mea Hana i kēia manawa: | 4.8 mA |
| Voltage lako hana: | 2.5 V/3.3 V |
| ʻAno Huahana: | FPGA - ʻĀpana Programmable Gate Array |
| Ka nui o ka waihona hale hana: | 119 |
| Māhele ʻāpana: | Nā IC Logic Programmable |
| Huina hoʻomanaʻo: | 170 kbit |
| inoa kalepa: | MachXO2 |
| Huina Weight: | 0.429319 oz |
1. Hoʻolālā Logic Flexible
• Eono mau mea me 256 a 6864 LUT4 a me 18 a 334 I/Os Mana Loa Haahaa.
• 65 nm kaʻina hana haʻahaʻa haʻahaʻa
• E like me ka 22 µW mana standby
• Programmable haʻahaʻa swing differential I/Os
• Kākoʻo kū a me nā koho mālama mana ʻē aʻe
• A hiki i ka 240 kbits sysMEM™ Hoʻokomo ʻia Block RAM
• A hiki i ka 54 kbits Distributed RAM
• Hoʻolaʻa manaʻo mana FIFO
3. Ma-Chip Mea hoʻohana Flash Memory
• A hiki i 256 kbits o ka mea hoʻohana Flash Memory
• 100,000 kaʻina kākau
• Loaʻa ma o WISHBONE, SPI, I2 C a me JTAG mau pilina
• Hiki ke hoʻohana ʻia e like me PROM kaʻina hana palupalu a i ʻole he hoʻomanaʻo Flash
4. Mamua-Engineered Source Synchronous I/O
• Hoʻopaʻa inoa ʻo DDR i nā keena I/O
• Hoʻokaʻaʻike gearing logic
• 7:1 E hoʻomaka ana no ka hōʻike I/Os
• DDR Generic, DDRX2, DDRX4
• Hoʻomanaʻo DDR/DDR2/LPDDR me ke kākoʻo DQS
5. Hana Ki'eki'e, Ho'opa'a I/O Ma'alahi
• Kākoʻo ka polokalamu sysIO™ buffer i ka laulā o nā mea hoʻopili:
– LVCMOS 3.3/2.5/1.8/1.5/1.2
– LVTTL
– PCI
– LVDS, Bus-LVDS, MLVDS, RSDS, LVPECL
– SSTL 25/18
– HSTL 18
- Nā mea hoʻokomo ʻo Schmitt, a hiki i ka 0.5 V hysteresis
• Kākoʻo ʻo I/Os i ke kumu wela
• Hoʻopau ʻokoʻa ma-chip
• ʻO ke ʻano huki huki a i ʻole ka huki ʻana i lalo
6. Hiki ke hoʻopaʻa ʻana ma luna o ka chip
• ʻEwalu mau wati mua
• A hiki i ʻelua uaki lihi no nā pānaʻi I/O kiʻekiʻe (nā ʻaoʻao luna a lalo wale nō)
• A hiki i ʻelua PLL analog no kēlā me kēia mea me ka fractional-n frequency synthesis
- Ka laulā hoʻokomo ākea (7 MHz a 400 MHz)
7. Non-volatile, Infinitely Reconfigurable
• Hikiwawe
- piʻi ka mana i nā microseconds
• Hoʻokahi pahu, hoʻonā palekana
• Hiki ke hoʻolālā ʻia ma o JTAG, SPI a i ʻole I2 C
• Kākoʻo i ka hoʻolālā ʻana o ka non-vola
8.tile hoʻomanaʻo
• Kāpae ʻelua koho me ka hoʻomanaʻo SPI waho
9. Hoʻonohonoho hou ʻo TransFR™
• In-field logic update i ka wā e holo ana ka ʻōnaehana
10. Hoʻonui i ke kākoʻo pae ʻōnaehana
• Nā hana paʻakikī ma luna o ka chip: SPI, I2 C, timer/ counter
• On-chip oscillator me 5.5% pololei
• Unique TraceID no ka huli ʻōnaehana
• Hoʻokahi manawa Programmable (OTP).
• ka lako mana hoʻokahi me ka laulā hana lōʻihi
• IEEE Standard 1149.1 palena palena
• IEEE 1532 hoʻokō i loko o ka ʻōnaehana polokalamu
11. Laulā o nā koho pāʻani
• TQFP, WLCSP, ucBGA, csBGA, caBGA, ftBGA, fpBGA, nā koho pūʻolo QFN
• Nā koho pūʻolo kapuaʻi liʻiliʻi
– E like me ka liʻiliʻi e like me 2.5 mm x 2.5 mm
• Kākoʻo ʻia ka neʻe ʻana o ka Density
• Hoʻopili piha ʻole halogen
