XC7A50T-2CSG324I FPGA – ʻĀpana Programmable Gate Array XC7A50T-2CSG324I
♠ wehewehe huahana
| Huahana Huahana | Waiwai Hiʻona |
| Mea hana: | Xilinx |
| Māhele Huahana: | FPGA - ʻĀpana Programmable Gate Array |
| moʻo: | XC7A50T |
| Ka helu o nā Elements Logic: | 52160 LE |
| Ka helu o nā I/Os: | 210 I/O |
| Voltage Hoʻolako - Min: | 0.95 V |
| Voltage Hoʻolako - Max: | 1.05 V |
| Mahana hana liʻiliʻi loa: | - 40 C |
| ʻO ka wela hoʻohana kiʻekiʻe loa: | + 100 C |
| Ka helu ʻikepili: | - |
| Ka helu o nā mea lawe uila: | - |
| Kāila kau ʻana: | SMD/SMT |
| Pūʻolo / hihia: | CSBGA-324 |
| Brand: | Xilinx |
| Hoʻolaha ʻia ka RAM: | 600 kbit |
| Pākaʻi RAM - EBR: | 2700 kbit |
| ʻAi ʻoluʻolu: | ʻAe |
| Ka helu o nā poloka Lahui Logic - LABs: | 4075 LAB |
| Voltage lako hana: | 1 V |
| ʻAno Huahana: | FPGA - ʻĀpana Programmable Gate Array |
| Ka nui o ka waihona hale hana: | 1 |
| Māhele ʻāpana: | Nā IC Logic Programmable |
| inoa kalepa: | Artix |
| Huina Wehe: | 1 oz |
♠ Xilinx® 7 series FPGAs he ʻehā ʻohana FPGA e kamaʻilio ana i ka piha piha o nā koi o ka ʻōnaehana, mai ke kumu kūʻai haʻahaʻa, kumu liʻiliʻi liʻiliʻi, nā kumu koʻikoʻi, nā noi kiʻekiʻe a hiki i ka bandwidth hoʻohui kiʻekiʻe kiʻekiʻe loa, ka mana logic, a me ka hiki ke hana hōʻailona no nā noi hana kiʻekiʻe loa.
Xilinx® 7 series FPGAs he ʻehā ʻohana FPGA e hoʻoponopono ana i ka piha piha o nā koi o ka ʻōnaehana, mai ke kumu kūʻai haʻahaʻa, ʻano kumu liʻiliʻi, nā kumu kūʻai, nā noi kiʻekiʻe a hiki i ka bandwidth hoʻohui kiʻekiʻe kiʻekiʻe, ka mana logic, a me ka hiki ke hana hōʻailona no nā noi kiʻekiʻe loa. Aia nā FPGA 7 series:
• ʻOhana Spartan®-7: Hoʻonui ʻia no ke kumu kūʻai haʻahaʻa, ka mana haʻahaʻa, a me ka hana I/O kiʻekiʻe. Loaʻa i ke kumu kūʻai haʻahaʻa, liʻiliʻi liʻiliʻi loa no ka PCB kapuaʻi liʻiliʻi.
• ʻOhana Artix®-7: Hoʻonui ʻia no nā noi haʻahaʻa haʻahaʻa e koi ana i nā transceivers serial a me DSP kiʻekiʻe a me ka logic throughput. Hāʻawi i ka helu haʻahaʻa haʻahaʻa o nā kumu kūʻai no nā noi kiʻekiʻe, nā kumu kūʻai.
• Kintex®-7 Family: Hoʻonui ʻia no ka hana kumu kūʻai maikaʻi loa me ka hoʻomaikaʻi ʻana o 2X i hoʻohālikelike ʻia me ka hanauna mua, e hiki ai i kahi papa hou o FPGA.
• ʻOhana Virtex®-7: Hoʻonui ʻia no ka hoʻokō ʻana o ka ʻōnaehana kiʻekiʻe a me ka hiki ke hoʻomaikaʻi 2X i ka hana ʻōnaehana. ʻO nā mea hana kiʻekiʻe loa i hoʻohana ʻia e ka ʻenehana hoʻohui silicon interconnect (SSI).
Kūkulu ʻia ma luna o kahi ʻenehana kaʻina hana kiʻekiʻe, hana kiʻekiʻe, haʻahaʻa haʻahaʻa (HPL), 28 nm, high-k metal gate (HKMG), 7 series FPGAs hiki ke hoʻonui i ka hoʻonui ʻole ʻia o ka hana ʻōnaehana me 2.9 Tb/s o ka bandwidth I/O, 2 miliona logic cell capacity, a me 5.3 TMAC/s mana ma mua o 50% ka hāʻawi ʻana i ka mana ma mua o 50% DSP. hiki ke koho ʻia i nā ASSP a me nā ASIC.
• ʻO ka loiloi FPGA kūlana kiʻekiʻe e pili ana i ka ʻenehana 6-input lookup table (LUT) hiki ke hoʻonohonoho ʻia e like me ka hoʻomanaʻo puʻupuʻu.
• 36 Kb pālua-puka poloka RAM me ka manaʻo FIFO i kūkulu ʻia no ka hoʻopaʻa ʻana i ka ʻikepili ma ka chip.
• ʻenehana SelectIO™ hana kiʻekiʻe me ke kākoʻo ʻana i nā pilina DDR3 a hiki i ka 1,866 Mb/s.
• Kiʻekiʻe-wikiwiki hoʻohui serial me ka nui-gigabit transceivers i kūkulu ʻia mai 600 Mb/s i ka max. nā pākēneka o 6.6 Gb/s a hiki i 28.05 Gb/s, e hāʻawi ana i kahi mode haʻahaʻa haʻahaʻa kūikawā, i hoʻopaʻa ʻia no nā interface chip-to-chip.
• He mea hoʻohana configurable analog interface (XADC), e hoʻokomo ana i ʻelua 12-bit 1MSPS analog-to-digital converters me nā mea ʻike wela a me nā lako lako.
• Nā ʻāpana DSP me 25 x 18 multiplier, 48-bit accumulator, a me pre-adder no ka kānana hana kiʻekiʻe, me ke kānana coefficient symmetric optimized.
• Nā kīleʻa hoʻokele uaki ikaika (CMT), e hui pū ana i ka loop loop-locked loop (PLL) a me ka hui ʻana o ke ʻano hoʻokele clock manager (MMCM) no ka pololei kiʻekiʻe a me ka jitter haʻahaʻa.
• Hoʻopili koke i ka hoʻoili ʻana i hoʻopili ʻia me ka ʻōnaehana MicroBlaze™.
• Poloka hoʻohui ʻia no PCI Express® (PCIe), no ka hoʻolālā ʻana i ka x8 Gen3 Endpoint a me Root Port.
• Nui nā ʻano koho hoʻonohonoho, me ke kākoʻo ʻana i nā mea hoʻomanaʻo waiwai, 256-bit AES encryption me HMAC/SHA-256 hōʻoia, a me ka ʻike a me ka hoʻoponopono SEU i kūkulu ʻia.
• ʻO ke kumu kūʻai haʻahaʻa, ka uwea paʻa, ka pahu pahu flipchip hoʻopaʻa ʻole, a me ka hōʻailona kiʻekiʻe e hāʻawi ana i ka neʻe maʻalahi ma waena o nā lālā o ka ʻohana i ka pūʻolo like. Loaʻa nā pūʻolo āpau ma Pb-noa a me nā pūʻolo i koho ʻia ma ke koho Pb.
• Hoʻolālā ʻia no ka hana kiʻekiʻe a me ka mana haʻahaʻa me 28 nm, HKMG, kaʻina HPL, 1.0V ʻenehana kaʻina hana uila a me ka koho 0.9V kumu uila no ka mana haʻahaʻa.
