STM32H750IBK6 ARM Microcontrollers – MCU hana kiʻekiʻe & DSP DP-FPU, Arm Cortex-M7 MCU 128Kbytes o Flash 1MB RAM, 480
♠ wehewehe huahana
| Huahana Huahana | Waiwai Hiʻona |
| Mea hana: | STMicroelectronics |
| Māhele Huahana: | ARM Microcontrollers - MCU |
| RoHS: | Nā kikoʻī |
| moʻo: | STM32H7 |
| Kāila kau ʻana: | SMD/SMT |
| Pūʻolo/Mahi: | UFBGA-176 |
| kumu: | ARM Cortex M7 |
| Ka nui o ka hoʻomanaʻo papahana: | 128 kB |
| ʻIkepili kaʻaahi laula: | 32 bit |
| Hoʻoholo ADC: | 3 x 16 bit |
| Ka nui o ka uaki: | 480 MHz |
| Ka helu o nā I/Os: | 140 I/O |
| Nui ʻikepili RAM: | 1 MB |
| Voltage Hoʻolako - Min: | 1.62 V |
| Voltage Hoʻolako - Max: | 3.6 V |
| Mahana hana liʻiliʻi loa: | - 40 C |
| ʻO ka wela hoʻohana kiʻekiʻe loa: | + 85 C |
| Packaging: | pā |
| Brand: | STMicroelectronics |
| Hoʻoholo DAC: | 12 bit |
| ʻAno RAM ʻikepili: | RAM |
| Voltage I/O: | 1.62 V a 3.6 V |
| ʻAno Interface: | CAN, I2C, SAI, SDI, SPI, USART, USB |
| ʻAi ʻoluʻolu: | ʻAe |
| Ka helu o nā kaha ADC: | 36 Kanal |
| Huahana: | MCU+FPU |
| ʻAno Huahana: | ARM Microcontrollers - MCU |
| ʻAno hoʻomanaʻo papahana: | Flash |
| Ka nui o ka waihona hale hana: | 1008 |
| Māhele ʻāpana: | Nā Microcontrollers - MCU |
| inoa kalepa: | STM32 |
| Nā hola kiaʻi: | ʻO ka manawa kiaʻi, puka makani |
| Huina Weight: | 111 mg |
♠ 32-bit Arm® Cortex®-M7 480MHz MCUs, 128 Kbyte Flash, 1 Mbyte RAM, 46 com.a me nā pilina analog, crypto
Hoʻokumu ʻia nā mea STM32H750xB ma luna o ka Arm® Cortex®-M7 32-bit RISC core hana kiʻekiʻe e hana ana a hiki i 480 MHz.Hōʻike ka Cortex® -M7 core i kahi ʻāpana lana lana (FPU) e kākoʻo ana i ka Arm® double-precision (IEEE 754 compliant) a me nā ʻōlelo aʻoaʻo a me nā ʻano ʻikepili.Kākoʻo nā mea STM32H750xB i kahi pūʻulu piha o nā ʻōlelo aʻo DSP a me kahi ʻāpana pale hoʻomanaʻo (MPU) e hoʻonui i ka palekana noi.
Hoʻokomo nā mea STM32H750xB i nā hoʻomanaʻo hoʻomanaʻo kiʻekiʻe me ka hoʻomanaʻo Flash o 128 Kbytes, a hiki i 1 Mbyte o RAM (me 192 Kbytes o TCM RAM, a hiki i 864 Kbytes o ka mea hoʻohana SRAM a me 4 Kbytes o ka SRAM kākoʻo), a me kahi ākea ākea. ka laulā o nā I/Os i hoʻonui ʻia a me nā ʻaoʻao pili i nā kaʻa kaʻa APB, nā pahi AHB, 2x32-bit multi-AHB matrix a me kahi hui AXI multi layer e kākoʻo ana i ke komo hoʻomanaʻo i loko a me waho.
Hāʻawi nā mea hana a pau i ʻekolu ADC, ʻelua DAC, ʻelua mau mea hoʻohālikelike mana haʻahaʻa haʻahaʻa, RTC haʻahaʻa haʻahaʻa, kahi manawa hoʻonā kiʻekiʻe, 12 mau manawa 16-bit kumu nui, ʻelua mau manawa PWM no ka mana kaʻa, ʻelima mau mana haʻahaʻa. , he mea hoʻoheheʻe helu random ʻoiaʻiʻo (RNG), a me ke kelepona wikiwiki cryptographic.Kākoʻo nā mea hana i nā kānana kikohoʻe ʻehā no nā modulators sigma-delta waho (DFSDM).Hāʻawi pū lākou i nā pilina kamaʻilio maʻamau a holomua.
Loaʻa iā ST ka ʻenehana patent ʻia
Core
• 32-bit Arm® Cortex®-M7 core me ka ʻike pālua FPU a me L1 cache: 16 Kbytes o ka ʻikepili a me 16 Kbytes o ka cache aʻo;alapine a hiki i 480 MHz, MPU, 1027 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1), a me nā ʻōlelo kuhikuhi DSP
Hoʻomanaʻo
• 128 Kbytes o ka hoʻomanaʻo Flash
• 1 Mbyte o RAM: 192 Kbytes o TCM RAM (inc. 64 Kbytes o ITCM RAM + 128 Kbytes o DTCM RAM no nā hana koʻikoʻi manawa), 864 Kbytes o ka mea hoʻohana SRAM, a me 4 Kbytes o SRAM ma ka waihona Backup
• ʻO ke ʻano hoʻomanaʻo ʻelua Quad-SPI e holo ana a hiki i 133 MHz
• Hoʻoponopono hoʻomanaʻo waho maʻalahi a hiki i ka 32-bit data bus: – SRAM, PSRAM, NOR Flash memo i hoʻopaʻa ʻia a hiki i 133 MHz ma ke ʻano synchronous – SDRAM/LPSDR SDRAM – 8/16-bit NAND Flash memo.
• Helu helu CRC
Palekana
• ROP, PC-ROP, hoʻopilikino ikaika, kākoʻo hoʻomaikaʻi paʻa paʻa paʻa paʻa paʻa, mode komo palekana
Nā mea hoʻokomo/puka kumu nui
• A hiki i 168 mau awa I/O me ka hiki ke hoopau
Hoʻoponopono hou a hoʻokele mana
• 3 mau kikowaena mana kaawale i hiki ke hoʻopaʻa ʻia a hoʻopau ʻia paha:
- D1: hiki ke hana kiʻekiʻe
- D2: nā peripheral kamaʻilio a me nā manawa
- D3: hoʻonohonoho hou / kaohi ʻana / ka hoʻokele mana
• 1.62 i 3.6 V lako noi a me I/Os
• POR, PDR, PVD a me BOR
• Hoʻokomo ʻia ka mana USB i hoʻokomo ʻia i kahi hoʻoponopono kūloko 3.3 V e hoʻolako i nā PHY kūloko
• Embedded regulator (LDO) me configurable scalable output to supply the digital circuitry
• Ka hoʻonui ʻia ʻana o ka uila ma ke ʻano holo a hoʻōki (6 mau pae hiki ke hoʻonohonoho ʻia)
• Mea hoʻoponopono waihona (~0.9 V)
• Nānā Voltage no ke kikowaena analog/VREF+
• Nā ʻano mana haʻahaʻa: Moe, Stop, Standby a me VBAT e kākoʻo ana i ka hoʻouka pila
Haʻahaʻa-mana hoʻohana
• ke ʻano hana pākaukau VBAT me ka hiki ke hoʻouka
• nā pine mākaʻikaʻi CPU a me ka mana aupuni
• 2.95 µA ma ke ʻano Standby (Backup SRAM OFF, RTC/LSE ON)
Hooponopono uaki
• ke ʻano hana pākaukau VBAT me ka hiki ke hoʻouka
• nā pine mākaʻikaʻi CPU a me ka mana aupuni
• 2.95 µA ma ke ʻano Standby (Backup SRAM OFF, RTC/LSE ON)
matrix pili
• 3 matrices kaʻa (1 AXI a me 2 AHB)
• Nā Alahaka (5× AHB2-APB, 2× AXI2-AHB)
4 DMA kaohi e wehe i ka CPU
• 1× kiʻekiʻe-māmā kiʻekiʻe kiʻekiʻe-māmā kuhikuhi pololei hoʻomanaʻo hoʻokele hoʻokele (MDMA) me ke kākoʻo papa inoa pili
• 2× mau awa ʻelua DMA me FIFO
• 1× kumu DMA me ka noi alaala hiki
A hiki i 35 mau peripheral kamaʻilio
• 4× I2Cs FM+ mau pilina (SMBus/PMBus)
• 4× USARTs/4x UARTs (ISO7816 interface, LIN, IrDA, a hiki i 12.5 Mbit/s) a me 1x LPUART
• 6× SPI, 3 me ka muxed duplex I2S pololei papa leo ma o ka PLL leo kūloko a i ʻole ka uaki waho, 1x I2S ma LP domain (a hiki i 150 MHz)
• 4x SAI (nā leo leo serial)
• SPDIFRX interface
• SWPMI hoʻokahi-uea protocol master I/F
• MDIO Slave interface
• 2× SD/SDIO/MMC mau pilina (a hiki i 125 MHz)
• 2× CAN mea hoʻomalu: 2 me CAN FD, 1 me ka manawa-hoʻomaka CAN (TT-CAN)
• 2× USB OTG mau mea hoʻohana (1FS, 1HS/FS) ka hoʻonā aniani-emi me LPM a me BCD
• Ethernet MAC pilina me DMA mana
• HDMI-CEC.
11 mau kikowaena analog
• 3× ADCs me 16-bit max.ka hoʻonā (a hiki i 36 mau kahawai, a hiki i 3.6 MSPS)
• 1× ʻike wela
• 2× 12-bit D/A mea hoʻololi (1 MHz)
• 2× nā mea hoʻohālikelike ultra-low-power
• 2× nā mea hoʻonui hana (7.3 MHz bandwidth)
• 1 × kikohoʻe kānana no ka sigma delta modulator (DFSDM) me 8 auwai / 4 kānana
Kiʻi kiʻi
• LCD-TFT hoʻoponopono a hiki i ka XGA hoʻonā
• ʻO Chrom-ART graphical hardware Accelerator (DMA2D) e hōʻemi i ka ukana CPU
• Paahana JPEG Codec
A hiki i 22 mau manawa a me nā ʻīlio kiaʻi
• 1× manawa hoʻonā kiʻekiʻe (2.1 ns hoʻonā kiʻekiʻe)
• 2× 32-bit mau manawa me ka hiki i ka 4 IC/OC/PWM a i ʻole ka helu pulse a me ka hoʻokomo hoʻoheheʻe quadrature (hoʻonui) (a hiki i 240 MHz)
• 2× 16-bit mau mana kaʻa kaʻa kiʻekiʻe (a hiki i 240 MHz)
• 10× 16-bit mau manawa hana maʻamau (a hiki i 240 MHz)
• 5× 16-bit ka mana haʻahaʻa manawa (a hiki i 240 MHz)
• 2× nā ʻīlio kiaʻi (kūʻokoʻa a me ka puka makani)
• 1× SysTick timer
• RTC me ka pololei o lalo kekona a me ka alemanaka lako
ʻO ka wikiwiki cryptographic
• AES 128, 192, 256, TDES,
• HASH (MD5, SHA-1, SHA-2), HMAC
• Nā mea hoʻopuka helu random maoli
ʻO ke ʻano hoʻopololei
• SWD & JTAG mau pilina
• 4-Kbyte Embedded Trace Buffer
