AM3352BZCZA100 Microprocessors – MPU ARM Cortex-A8 MPU
♠ wehewehe huahana
| Huahana Huahana | Waiwai Hiʻona |
| Mea hana: | Nā mea kani ʻo Texas |
| Māhele Huahana: | Microprocessors - MPU |
| RoHS: | Nā kikoʻī |
| Kāila kau ʻana: | SMD/SMT |
| Pūʻolo/Mahi: | PBGA-324 |
| moʻo: | AM3352 |
| kumu: | ARM Cortex A8 |
| Ka helu o nā Core: | 1 Core |
| ʻIkepili kaʻaahi laula: | 32 bit |
| Ka nui o ka uaki: | 1 GHz |
| L1 Cache Instruction Memory: | 32 kB |
| L1 Cache Data Memory: | 32 kB |
| Voltage lako hana: | 1.325 V |
| Mahana hana liʻiliʻi loa: | - 40 C |
| ʻO ka wela hoʻohana kiʻekiʻe loa: | + 125 C |
| Packaging: | pā |
| Brand: | Nā mea kani ʻo Texas |
| Nui ʻikepili RAM: | 64 kB, 64 kB |
| Nui ʻikepili ROM: | 176 kB |
| Mea hoʻomohala: | TMDXEVM3358 |
| Voltage I/O: | 1.8 V, 3.3 V |
| ʻAno Interface: | CAN, Ethernet, I2C, SPI, UART, USB |
| L2 Cache Instruction / Memory Data: | 256 kB |
| ʻAno hoʻomanaʻo: | L1/L2/L3 Cache, RAM, ROM |
| ʻAi ʻoluʻolu: | ʻAe |
| Ka helu o nā hola / helu: | 8 Manawa |
| Pūʻina hana: | Sitara |
| ʻAno Huahana: | Microprocessors - MPU |
| Ka nui o ka waihona hale hana: | 126 |
| Māhele ʻāpana: | Microprocessors - MPU |
| inoa kalepa: | Sitara |
| Nā hola kiaʻi: | ʻO ka manawa kiaʻi |
| Huina Weight: | 1.714 g |
♠ AM335x Sitara™ Mea Hana
ʻO nā microprocessors AM335x, i hoʻokumu ʻia ma ka ARM Cortex-A8 processor, ua hoʻonui ʻia me ke kiʻi, ka hana kiʻi kiʻi, peripherals a me nā koho ʻenehana ʻoihana e like me EtherCAT a me PROFIBUS.Kākoʻo nā mea hana i nā ʻōnaehana hana kiʻekiʻe (HLOS).Loaʻa ka polokalamu SDK Linux® a me TI-RTOS me ka uku ʻole mai TI.
Aia i loko o ka microprocessor AM335x nā subsystem i hōʻike ʻia ma ka Functional Block Diagram a me kahi wehewehe pōkole o kēlā me kēia:
Aia nā subsystem i hōʻike ʻia ma ka Functional Block Diagram a me kahi wehewehe pōkole o kēlā me kēia:
Hoʻokumu ʻia ka subsystem microprocessor unit (MPU) ma ka ʻōnaehana ARM Cortex-A8 a me ka subsystem PowerVR SGX™ Graphics Accelerator e hāʻawi i ka wikiwiki kiʻi 3D e kākoʻo i ka hōʻike a me nā hopena pāʻani.Hoʻokaʻawale ʻia ka PRU-ICSS mai ke kumu ARM, e ʻae ana i ka hana kūʻokoʻa a me ka hoʻopaʻa ʻana no ka pono a me ka maʻalahi.
Hiki i ka PRU-ICSS ke hoʻohana i nā kikowaena peripheral hou aʻe a me nā protocol manawa maoli e like me EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, a me nā mea ʻē aʻe.Hoʻohui ʻia, ʻo ke ʻano papahana o ka PRU-ICSS, me kona loaʻa ʻana i nā pine, nā hanana a me nā kumuwaiwai system-on-chip (SoC), hāʻawi i ka maʻalahi i ka hoʻokō ʻana i nā pane wikiwiki a me ka manawa maoli, nā hana mālama ʻikepili kūikawā, nā pilina peripheral maʻamau. , a me ka hoʻokuʻu ʻana i nā hana mai nā core processor ʻē aʻe o SoC.
• A hiki i 1-GHz Sitara™ ARM® Cortex® -A8 32‑Bit RISC Processor
- NEON™ SIMD Coprocessor
- 32KB o ka L1 Aʻo a me 32KB o ka ʻikepili Cache me ka ʻike hewa hoʻokahi (Parity)
– 256KB o L2 Cache me ka hewa hoʻoponopono code (ECC)
- 176KB o On-Chip Boot ROM
- 64KB o RAM hoʻolaʻa
- Hoʻohālikelike a me ka Debug - JTAG
- Ka Hoʻoponopono Interrupt (a hiki i 128 Nā noi Interrupt)
• Hoʻomanaʻo ma-Chip (L3 RAM Kaʻana like)
– 64KB o General-Purpose On-Chip Memory Controller (OCMC) RAM
- Loaʻa i nā haku a pau
- Kākoʻo i ka mālama ʻana no ka Wakeup wikiwiki
• Nā Interface Memo waho (EMIF)
– mDDR(LPDDR), DDR2, DDR3, DDR3L Controller:
– mDDR: 200-MHz Clock (400-MHz Ikepili Rahi)
– DDR2: 266-MHz Clock (532-MHz Ikepili Rahi)
– DDR3: 400-MHz Clock (800-MHz Ikepili Rahi)
– DDR3L: 400-MHz Clock (800-MHz Ikepili Rahi)
– 16-Bit Data Bus
- 1GB o ka nui o nā wahi kikoʻī
- Kākoʻo i hoʻokahi x16 a i ʻole ʻelua x8 hoʻonohonoho hoʻonohonoho hoʻomanaʻo
– Mea hoʻoponopono hoʻomanaʻo maʻamau (GPMC)
- Hiki ke hoʻololi i ka 8-Bit a me ka 16-Bit Asynchronous Memory Interface a hiki i ʻEhiku Chip Koho (NAND, NOR, Muxed-NOR, SRAM)
- Hoʻohana i ka BCH Code e kākoʻo i ka 4-, 8-, a i ʻole 16-Bit ECC
- Hoʻohana i ka Hamming Code e kākoʻo i ka 1-Bit ECC
– Helu Locator Module (ELM)
- Hoʻohana pū ʻia me ka GPMC no ka ʻimi ʻana i nā helu wahi o nā hewa ʻikepili mai nā Syndrome Polynomials i hana ʻia me ka BCH Algorithm.
- Kākoʻo iā 4-, 8-, a me 16-Bit no 512-Byte Block Error Location ma muli o BCH Algorithms
• Pūnaehana Pūnaehana Manawa Manawa Pono a me nā Pūnaehana Kūkākūkā ʻOihana (PRU-ICSS)
- Kākoʻo i nā Protocols e like me EtherCAT®, PROFIBUS, PROFINET, EtherNet/IP™, a me nā mea hou aku.
– ʻElua mau ʻāpana manawa maoli (PRU)
- 32-Bit Load/Store RISC Processor Hiki ke holo ma 200 MHz
- 8KB o ka ʻōlelo aʻo RAM me ka ʻike hewa hoʻokahi (Parity)
- 8KB o ka ʻikepili RAM me ka ʻike hewa hoʻokahi (Parity)
– Hoʻokahi-Poke 32-Bit Multiplier Me 64-Bit Accumulator
- Hāʻawi ka Module GPIO i hoʻonui ʻia i ke kākoʻo Shift In/Out a me ka Latch Parallel ma ka hōʻailona waho
- 12KB o ka RAM Shared me ka ʻike hewa hoʻokahi (Parity)
- ʻEkolu mau waihona hoʻopaʻa inoa 120-Byte i loaʻa e kēlā me kēia PRU
- Manaʻo Interrupt (INTC) no ka mālama ʻana i nā hanana hoʻokomo ʻōnaehana
- Kaʻa Kaʻa Kūʻokoʻa no ka hoʻohui ʻana i nā haku kūloko a me waho i nā kumuwaiwai i loko o ka PRU-ICSS
- Nā ʻaoʻao i loko o ka PRU-ICSS:
- Hoʻokahi Port UART me nā Pins Flow Control, Kākoʻo iā 12 Mbps
- Hoʻokahi Module Hoʻopiʻi Hoʻopiʻi (eCAP).
- ʻElua mau kikowaena MII Ethernet e kākoʻo ana i ka Ethernet Industrial, e like me EtherCAT
– Hookahi awa MDIO
• Mana, Hoʻoponopono hou, a me ka Hoʻoponopono Uaki (PRCM) Module
- Hoʻomalu i ke komo ʻana a me ka puka ʻana o nā ʻano kū a me ka hiamoe hohonu
- He kuleana no ka hoʻonohonoho ʻana i ka moe, ka hoʻololi ʻana i ka mana Domain, ka hoʻāla ʻana, a me ka hoʻololi ʻana i ka mana Domain.
– Uaki
- Hoʻohui ʻia ʻo 15- a i ka 35-MHz High-Frequency Oscillator i hoʻohana ʻia e hana i kahi uaki kuhikuhi no nā ʻōnaehana like ʻole a me nā uaki peripheral.
- Kākoʻo i ka uaki hoʻokahi a hoʻopau i ka mana no nā subsystems a me nā peripheral e hoʻomaʻamaʻa i ka hoʻemi ʻana i ka mana.
- ʻElima mau ADPLL e hana i nā wati ʻōnaehana (MPU Subsystem, DDR Interface, USB a me nā Peripherals [MMC a me SD, UART, SPI, I 2C], L3, L4, Ethernet, GFX [SGX530], LCD Pixel Clock)
– Mana
- ʻElua mau ʻāpana mana hiki ʻole ke hoʻololi ʻia (Wake-manawa maoli [RTC], Wake-Up Logic [WAKEUP])
- ʻEkolu Nā Mana Mana Hoʻololi (MPU Subsystem [MPU], SGX530 [GFX], Peripherals and Infrastructure [PER])
- Hoʻohana ʻo SmartReflex™ Class 2B no ka hoʻonui ʻana i ka uila ma muli o ka wela o ka make, ka hoʻololi ʻana o ke kaʻina hana, a me ka hana (Adaptive Voltage Scaling [AVS])
– Ka hoʻonui pinepine ʻana o ka Voltage Voltage (DVFS)
• Uaka manawa maoli (RTC)
- ʻO ka lā manawa maoli (La-Mahina-makahiki-La o ka pule) a me ka ʻike manawa (Hula-minuke-kekona)
– Loko 32.768-kHz Oscillator, RTC Logic a me 1.1-V Loko LDO
- Hoʻokomo hou i ka mana kūʻokoʻa (RTC_PWRONRSTn).
- Pin hoʻokomo i hoʻolaʻa ʻia (EXT_WAKEUP) no nā hanana Wake waho
- Hiki ke hoʻohana ʻia ka Alarm Programmable no ka hana ʻana i nā pilikia kūloko i ka PRCM (no Wakeup) a i ʻole Cortex-A8 (no ka hoʻolaha hanana)
- Hiki ke hoʻohana ʻia ka Alarm Programmable me ka Output waho (PMIC_POWER_EN) e hiki ai i ka IC Mana Mana e hoʻihoʻi i nā Domain Power Non-RTC
• Pilipili
- A hiki i ʻelua USB 2.0 High-Speed DRD (Dual-Role Device) nā awa me ka PHY hoʻohui.
- A hiki i ʻelua mau kikowaena Gigabit Ethernet MAC (10, 100, 1000 Mbps)
– Hoʻololi i hoʻohui ʻia
- Kākoʻo kēlā me kēia MAC i MII, RMII, RGMII, a me MDIO Interfaces
- Hiki i nā Ethernet MAC a me ka Switch ke hana kūʻokoʻa i nā hana ʻē aʻe
– IEEE 1588v1 Kūkākūkā manawa kūpono (PTP)
– A hiki i ʻelua mau ʻĀpana Pūnaewele-Area (CAN).
- Kākoʻo iā CAN Version 2 ʻāpana A a me B
- A hiki i ʻelua mau kikowaena leo leo leo nui (McASPs)
- Hoʻouna a loaʻa i nā uaki a hiki i 50 MHz
- A hiki i ʻehā mau ʻikepili ʻikepili no kēlā me kēia awa ʻo McASP me nā uaki kūʻokoʻa TX a me RX
- Kākoʻo i ka Time Division Multiplexing (TDM), Inter-IC Sound (I2S), a me nā ʻano like
- Kākoʻo i ka hoʻouna ʻana i ka leo leo kikohoʻe (SPDIF, IEC60958-1, a me nā ʻano AES-3)
- FIFO Buffers no ka lawe ʻana a me ka loaʻa ʻana (256 Bytes)
- A hiki i ʻeono mau UART
- Kākoʻo nā UART āpau i nā ʻano IrDA a me CIR
- Kākoʻo nā UART āpau iā RTS a me CTS Flow Control
- Kākoʻo ʻo UART1 i ka mana modem piha
- A hiki i ʻelua Master a me Slave McSPI Serial Interfaces
- A hiki i ʻelua mau koho Chip
- A hiki i 48 MHz
- A hiki i ʻekolu MMC, SD, SDIO Port
- 1-, 4- a me 8-Bit MMC, SD, SDIO mau ʻano
- Ua hoʻolaʻa ʻia ʻo MMCSD0 no ka hana 1.8‑V a i ʻole 3.3-V.
- A hiki i ka 48-MHz Ikepili Hoʻololi
- Kākoʻo i ka ʻike kāleka a kākau i ka pale
- Hoʻopili me MMC4.3, SD, SDIO 2.0 kikoʻī
- A hiki i ʻekolu I 2C Master a me Slave Interfaces
- Ke ʻano maʻamau (a hiki i 100 kHz)
- Ke ʻano wikiwiki (a hiki i 400 kHz)
– A hiki i ʻEhā mau Panakō o nā Pin I/O (GPIO).
- 32 GPIO Pins no kēlā me kēia Bank (Multiplexed Me nā Pin Hana ʻē aʻe)
- Hiki ke hoʻohana ʻia nā GPIO Pins e like me nā Input Interrupt (a hiki i ʻelua Input Interrupt no kēlā me kēia Bank)
- A hiki i ʻekolu mau mea hoʻokomo hanana DMA waho i hiki ke hoʻohana ʻia e like me nā hoʻokomo hoʻopili
– ʻEwalu 32-Bit General-Purpose Timer
- ʻO DMTIMER1 kahi manawa 1-ms i hoʻohana ʻia no ka ʻōnaehana ʻōnaehana (OS).
- Ua hoʻopaʻa ʻia ʻo DMTIMER4–DMTIMER7
- Hoʻokahi kiaʻi kiaʻi manawa
– SGX530 3D kiʻi ʻenekini
- Hoʻokumu ʻia ʻo Tile-Based Architecture e hāʻawi ana i 20 miliona polygons i kēlā me kēia kekona
- Universal Scalable Shader Engine (USSE) he Multithreaded Engine e hoʻokomo ana i ka Pixel a me Vertex Shader Functionality
- Hoʻonohonoho ʻia nā hiʻohiʻona kiʻekiʻe Shader ma mua o Microsoft VS3.0, PS3.0, a me OGL2.0
- Kākoʻo API maʻamau o Direct3D Mobile, OGL-ES 1.1 a me 2.0, a me OpenMax
- Ke hoʻololi ʻana i ka hana maikaʻi, ka hoʻouka ʻana, a me ka hoʻokele mana
- ʻO Geometry DMA-Driven Operation no ka liʻiliʻi loa o ka CPU Interaction
– Kiʻi Kiʻi Kūlana Kiʻekiʻe Programmable Anti-Aliasing
- Ka hoʻomaopopo piha ʻana i ka hoʻomanaʻo hoʻomanaʻo ʻana no ka hana OS ma kahi hoʻomanaʻo hoʻomanaʻo hoʻokahi
• Nā Pili Piliwaiwai
• Home a me Industrial Automation
• Nā Mea Lapaʻau Mea Hoʻohana
• Mea Paipai
• Pūnaehana Uku Naauao
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• Nā mea kaupaona
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